(1) Field of the Invention
The present invention relates generally to image sensing devices and more particularly to methods of fabrication of such devices.
(2) Description of Prior Art
Image sensors are utilized extensively in modern technology. U.S. Pat. No. 5,854,100 to Chi shows a method of forming a new bipolar/CMOS pixel for high-resolution imagers. The active pixci sensor has a photodiode, a bipolar transistor and a MOS transistor, is immune to image blooming and reduces image lag. U.S. Pat. No. 5,625,210 to Lee et al. shows a method to utilize CMOS and CCD technologies to achieve a pinned photodiode integrated into the image-sensing element of an active pixel sensor. Merrill in U.S. Patent No. 5,614,744 discloses a CMOS based low leakage array with anti-blooming isolation. (Guard rings and/or protective diffusions are utilized to isolate the image-sensing array from electrons generated at the periphery of the active area. U.S. Pat. No. 5,466,612 to Fuse et al. teaches a method of manufacturing a solid-state image-sensing device. Low leakage current in the photodiode is achieved by the addition of a shallow fluorine implant through an oxide layer. A CMOS image sensor with pixel level A/D conversion is shown in U.S. No. Pat. 5,461,425 to Fowler et al. Light induced analog signals generated by phototransistors are converted to serial bit streams by A/D converters connected at the output of each phototransistor.
Conventional image sensing devices often utilize junction photodiodes as the photosensitive device. The ion implants required to form these junction photodiodes are performed simultaneously with the source drain implants of the adjacent FET and the photodiode implants are extensions of source I drain regions. This is shown in FIG. 1 Prior Art for a lightly doped drain (LLD) n-channel FET (NFET). Region 4 is a gate oxide grown over the surface of a p-well. A polysilicon gate electrode, 6, is formed and a first, lower dose, implant is self-aligned to the gate electrode to achieve an n-region, 14, below the gate oxide extending to the field oxide, 10. An implant mask, 12, which could be photoresist, is disposed over the field oxide. Oxide spacers, 8, are then formed and a second, higher dose, implant is self-aligned to the oxide spacers. An n+region, 16, is thus achieved, disposed under the n-region, separated from the gate electrode by about the thickness of the oxide spacer and extending to the field oxide. The n region of the junction photodiode thus formed is an extension of the FET drain. The characteristics of the implants forming this region, chosen to optimize the FET performance, are not likely to optimize the performance of the junction photodiode.
Accordingly, it is a primary objective of the invention to provide a method of forming a CMOS image sensor that permits optimization of both the photodiode and the FET. This objective is achieved by using an extra mask for the ion implantation of the photodiode and adjusting the implantation characteristics specifically to attain desired photodiode properties. The specie, energy and dose of the implantation determine the depth of the photodiode junction. Ability to vary the depth allows for control of the relative response of the photodiode to the wavelength of the incident light. Furthermore, sources of photodiode leakage generally accumulate near surfaces and edges and by providing a sufficiently deep junction these sources of leakage can be avoided.
In a preferred embodiment of the invention a partially processed n-type semiconductor substrate is provided in which a p-well or p-substrate has been formed. The surface of the p-well or p-substrate consists of a region of gate oxide bounded by field oxide. A conductive gate structure is disposed asymmetrically on the gate oxide, On one side a source/drain region can be accommodated under the gate oxide in an area bounded by the gate and the field oxide, On the other side, the area bounded by the gate and the field oxide can also accommodate a photodiode between a source/drain region and the field oxide, with some overlap of the photodiode and source/drain region. Using a mask that is open only over the gate, the source/drain regions and the overlap region, a shallow, low dose, donor ion implantation is performed. Insulating spacers are then applied to the gate sidewalls by depositing an insulating layer and etching this layer with an anisotropic etch. Again using a mask that is open only over the gate, the source/drain regions and the overlap region, a deeper, higher dose, donor ion implantation is performed. Next, the photodiode implant is performed using a mask open only over the photodiode area and the area of overlap of the photodiode and source/drain. This donor implant is deeper than the source/drain implants. A transparent insulating layer is now deposited.
Lightly doped drain structures for PMOS transistors on the substrate are achieved by first performing a shallow, low dose, acceptor ion implant. Insulating spacers on the gate are then fabricated concurrent with the insulating spacers of the NMOS transistors, including those of the image sensor. A deeper, higher dose, acceptor ion implant follows which is done before deposition of the transparent insulating layer.
A method of forming an image sensor is disclosed. A partially processed semiconductor wafer is provide, containing p-type and/or n-type regions which are bounded by isolation regions and with gate oxide layers grown on the surfaces upon which gate electrode structures are disposed, some of said gate electrode structures will serve as gate electrodes of image sensor transistors. Ions are implanted to form source/drain structures about the said gate electrode structures, with an extended region for source drains bordering photodiode regions. Ions are implanted to form photodiodes, overlapping the extended bordering source drain regions. A blanket transparent insulating layer is deposited.